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Philips Semiconductors
256 × 8-bit static low-voltage RAM with
I 2 C-bus interface
Product speci?cation
PCF8570
12 AC CHARACTERISTICS
All timing values are valid within the operating supply voltage and ambient temperature range and reference to V IL and
V IH with an input voltage swing of V SS to V DD .
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
I 2 C-bus timing (see Fig.10; note 1)
f SCL
t SP
t BUF
t SU;STA
t HD;STA
t LOW
t HIGH
t r
t f
t SU;DAT
t HD;DAT
t VD;DAT
t SU;STO
SCL clock frequency
tolerable spike width on bus
bus free time
START condition set-up time
START condition hold time
SCL LOW time
SCL HIGH time
SCL and SDA rise time
SCL and SDA fall time
data set-up time
data hold time
SCL LOW-to-data out valid
STOP condition set-up time
?
?
4.7
4.7
4.0
4.7
4.0
?
?
250
0
?
4.0
?
?
?
?
?
?
?
?
?
?
?
?
?
100
100
?
?
?
?
?
1.0
0.3
?
?
3.4
?
kHz
ns
μ s
μ s
μ s
μ s
μ s
μ s
μ s
ns
ns
μ s
μ s
Note
1. A detailed description of the I 2 C-bus specification, with applications, is given in brochure “The I 2 C-bus and how to
use it”. This brochure may be ordered using the code 9398 393 40011.
handbook, full pagewidth
PROTOCOL
START
CONDITION
BIT 7
MSB
BIT 6
(A6)
BIT 0
LSB
ACKNOWLEDGE
(A)
STOP
CONDITION
(S)
(A7)
(R/W)
(P)
t SU;STA
t LOW
t HIGH
1 / f SCL
SCL
t
BUF
t r
t
f
SDA
t HD;STA
t SU;DAT
t
HD;DAT
t VD;DAT
MBD820
t SU;STO
Fig.10 I 2 C-bus timing diagram; rise and fall times refer to V IL and V IH .
1999 Jan 06
10
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